Everything to support the x86-64 architecture is in this namespace.
Classes
| Class | Description | |
|---|---|---|
| Architecture |
Describes the x86 processor architecture.
| |
| CpuType |
Describes a type of CPU.
| |
| EncodedInstruction |
Represents an encoded instruction.
| |
| EncodedInstruction..::..ModRMByte |
Represents the ModR/M byte.
| |
| EncodedInstruction..::..SibByte |
Represents the SIB byte.
| |
| EncodedInstruction..::..SubStructure |
A base class for sub structures of the EncodedInstruction.
| |
| Instruction |
An x86-64 instruction.
| |
| InstructionConditionExtensions |
Extension methods to the InstructionCondition enumeration type.
| |
| RegisterExtensions |
Extensions for the Register type.
| |
| RegisterTypeExtensions |
Extensions for the RegisterType type.
|
Interfaces
| Interface | Description | |
|---|---|---|
| IConditionalInstruction |
An interface for instructions which are executed depending on a condition.
| |
| ILockInstruction |
An interface for instructions which can have a lock prefix.
|
Enumerations
| Enumeration | Description | |
|---|---|---|
| CpuFeatures |
Specifies features which may or may not be used by the assembler.
| |
| EncodedInstruction..::..PrefixAddressSizeOverride |
Specifies prefixes from group 3 allowed to precede an instruction.
| |
| EncodedInstruction..::..PrefixLockRepeat |
Specifies prefixes from group 1 allowed to precede an instruction.
| |
| EncodedInstruction..::..PrefixOperandSizeOverride |
Specifies prefixes from group 4 allowed to precede an instruction.
| |
| EncodedInstruction..::..PrefixSegmentBranch |
Specifies prefixes from group 2 allowed to precede an instruction.
| |
| InstructionCondition |
Specifies the type of condition on which the instruction executes.
| |
| Register |
An x86-64 register.
| |
| RegisterType |
Specifies a type of register.
|